Volume & Issue no: Volume 11, Issue 4, July - August 2022
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Title: |
Simulation of Floating-Point Division Algorithms |
Author Name: |
Shreehitha M. U., Dr. Jayanthi P. N. |
Abstract: |
Abstract: Multiple algorithms are available to implement
division on hardware. The rate of quotient convergence,
mathematical equations with respect to its formulae, and
underlying hardware primitives all change between these
algorithms. The complexity of these algorithms increases when
it comes to floating-point division. The research proposes a
comparison of three division algorithms based on their
simulations and design implications. Sweeney, Robertson, and
Tocher (SRT), Gold Schmidt, and Coordinate Rotation Digital
Computer (CORDIC) division algorithms are simulated on the
Vivado design suite and compared. It is found that CORDIC
outperforms the other two by giving the least delay of 4.254ns
and 235.048Mhz of maximum frequency. The results show a
61.19% and 51% decrease in delay for CORDIC with respect to
Gold Schmidt and SRT algorithms respectively.
Keywords: SRT, CORDIC, Gold Schmidt, Division |
Cite this article: |
Shreehitha M. U., Dr. Jayanthi P. N. , "
Simulation of Floating-Point Division Algorithms" , International Journal of Emerging Trends & Technology in Computer Science (IJETTCS) ,
Volume 11, Issue 4, July - August 2022 , pp.
001-004 , ISSN 2278-6856.
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